The present invention relates to a method for fabricating a semiconductor device, and more particularly, to a method for forming a channel of a fin transistor by implanting ions in a semiconductor device.
Due to a superior on-off characteristic as well as other characteristics including high drive current and high packing density, a fin transistor is expected to replace the typical planar transistor in a nano-scale dynamic random access memory (DRAM) cell transistor. Generally, a beamline ion implantation process has been employed to form a channel in a fin transistor.
FIG. 1 is a top view illustrating a typical fin transistor. Fin active regions 13 are formed in a substrate 11 by forming isolation regions (not shown) using fin masks 14. A reference denotation ‘A’ represents exposed regions after the fin masks 14 are formed.
FIGS. 2A and 2B are cross-sectional views of the fin transistor in FIG. 1 cut along a perforated line II to II′, illustrating various typical methods for forming a channel of a fin transistor.
Referring to FIG. 2A, the isolation region 12 is formed in the substrate 11, and the fin active region is defined by the isolation region 12. Then, an etching process is performed to form the fin active region 13.
A beamline ion implantation process for forming a channel of the fin transistor is performed to form a channel-intended region 15A inside the fin active region 13. When forming the channel-intended region 15A by employing the beamline ion implantation process, ions are implanted thicker in an upper portion of the fin active region 13 than side portions of the fin active region 13. Due to this characteristic of the beamline ion implantation process, the channel-intended region 15A has different thicknesses in the upper and side portions of the fin active region 13.
That is, if the beamline ion implantation process is employed to implant ions in the sidewalls of the fin active region 13, it is generally difficult to obtain a uniform doping profile in a 3-dimensional channel depth of a fin transistor. Therefore, a doping method using a plasma of trifluoroborane (BF3) gas has been introduced to replace the 2-dimensional ion implantation process.
Referring to FIG. 2B, the isolation region 12 is formed in the substrate 11, and the fin active region is defined by the isolation region 12. An etching process is performed to form the fin active region 13.
A plasma doping process is performed using BF3 plasma to form a channel region 15B inside the fin active region 13. However, a channel doping process using the BF3 plasma or fluorine may result in surface damage ‘B’ on a top portion of the fin active region 13. Thus, a dangling bond is generated on a surface of silicon where the channel is to be formed.
If the beamline ion implantation process is performed, it is generally difficult to form the uniform doping profile in the 3-dimentional channel depth of the fin transistor. However, it is possible to implant ions in a certain regional area through the beamline ion implantation process. If the ion implantation takes place by employing the plasma doping process, it is possible to obtain the uniform doping profile in the 3-dimentional fin active region. However, the dangling bond may result from damage to the channel boundary regions caused by the fluorine radicals, and the dangling bond may function as a trap. Thus, device characteristics may be deteriorated. Although such limitation can be reduced by employing an annealing process, the annealing process may complicate the manufacturing process.